The disclosed invention generally relates to phase locked loop circuits, and is more particularly directed to a loop filter for phase lock loop circuits which provides for reduced perturbations on the phase locked loop circuit output when output frequency correction takes place.
Phase lock loop (PLL) circuits are closed loop circuits which are utilized in signal processing and digital systems to provide timing signals having predetermined frequencies. In a given PLL circuit, the frequency of the output signal is derived from a reference signal having a reference frequency, which may be provided by an appropriate crystal oscillator circuit, for example.
A PLL circuit generally includes a voltage controlled oscillator (VCO), a divide-by-N circuit, a frequency/phase comparator, and a loop filter. The VCO is controlled by the voltage output of the loop filter, which in turn is controlled by the frequency/phase comparator. The VCO provides the output of the PLL circuit which has a frequency that is N times the frequency of a reference signal. The output of the VCO is also provided to the divide-by-N circuit, which provides an output that is coupled to the phase/frequency comparator along with the reference signal.
Examples of phase-locked loop circuits are shown in "The RCA COS/MOS Phase-Locked Loop, A Versatile Building Block for Micro-Power Digital and Analog Applications," Morgan, RCA Solid State '74 Databook Series, pp. 360-367, RCA Corporation, 1973.
In operation, the output frequency is determined by the control voltage provided by the loop filter, and correction is achieved by changing such control voltage. An important consideration with respect to a loop filter is the nature in which the control voltage is changed, particularly in the presence of phase jitter. In phase locked loop systems, as in circuits generally, there is noise, and such noise randomly causes slight phase jitter in the two signals applied to the phase/frequency comparator. The phase jitter will be detected in the phase/frequency comparator, and the output will include the effects of such phase jitter, causing changes in the output control voltage provided by the loop filter to the VCO. With known loop filter designs, the change in control voltage includes large abrupt voltage changes, which causes large frequency variations in the frequency of the PLL output signal provided by the VCO. Depending upon the application, the amount of variation in frequency could be intolerable.
An example of a known loop filter circuit is disclosed in "A Single-Chip Code with Switched-Capacitor Filters," Iwata et al, IEEE Journal of Solid-State Physics, Vol. SC-16, No. 4, pp. 315-321, August 1981.